Documente Tehnice (Imaginile sunt cu titlu informativ. Va rugam sa consultati specificatiile tehnice.)
Specificatii
Marca
NexperiaProduct Type
Shift Register
Montare
Surface
Tensiune de alimentare maxima
6V
Temperatura minima de lucru
-40°C
Temperatura maxima de lucru
125°C
Standards/Approvals
RoHS
Detalii Produs
The 74HC4094, 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH.
Informatii despre stoc temporar indisponibile
€ 33,50
€ 0,67 Each (In a Tube of 50) (fara TVA)
€ 40,54
€ 0,811 Each (In a Tube of 50) (cu TVA)
50
€ 33,50
€ 0,67 Each (In a Tube of 50) (fara TVA)
€ 40,54
€ 0,811 Each (In a Tube of 50) (cu TVA)
Informatii despre stoc temporar indisponibile
50
| Cantitate | Pret unitar | Per Tub |
|---|---|---|
| 50 - 50 | € 0,67 | € 33,50 |
| 100 - 200 | € 0,62 | € 31,00 |
| 250 - 450 | € 0,61 | € 30,50 |
| 500 - 950 | € 0,59 | € 29,50 |
| 1000+ | € 0,58 | € 29,00 |
Documente Tehnice (Imaginile sunt cu titlu informativ. Va rugam sa consultati specificatiile tehnice.)
Specificatii
Marca
NexperiaProduct Type
Shift Register
Montare
Surface
Tensiune de alimentare maxima
6V
Temperatura minima de lucru
-40°C
Temperatura maxima de lucru
125°C
Standards/Approvals
RoHS
Detalii Produs
The 74HC4094, 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH.