Documente Tehnice (Imaginile sunt cu titlu informativ. Va rugam sa consultati specificatiile tehnice.)
Specificatii
Marca
STMicroelectronicsProduct Type
Watchdog Timer
Montare
Surface
Sub Type
Watchdog
Tip pachet
SOT-323
Number of Internal Timers
1
Numar pini
5
Tensiune de alimentare minima
2.7V
Tensiune de alimentare maxima
5.5V
Temperatura maxima de lucru
125°C
Frecventa minima de auto-rezonanta
-40°C
Lungime
2.2mm
Inaltime
1mm
Standards/Approvals
No
Automotive Standard
AEC-Q100
Series
STWD100
Detalii Produs
The Watchdog Timer integrated circuit is a self-contained device for preventing system failures. Certain types of hardware or software errors could cause the electronics system to fail. The watchdog timer has an input that is used to clear the watchdog timer periodically within a specified timeout period. While the system is operating correctly, the watchdog output is not asserted. If the watchdog timer is not cleared, the watchdog output generates a processor interrupt or reset.
Informatii despre stoc temporar indisponibile
€ 7,50
€ 0,75 Buc. (Intr-un pachet de 10) (fara TVA)
€ 9,08
€ 0,908 Buc. (Intr-un pachet de 10) (cu TVA)
Standard
10
€ 7,50
€ 0,75 Buc. (Intr-un pachet de 10) (fara TVA)
€ 9,08
€ 0,908 Buc. (Intr-un pachet de 10) (cu TVA)
Informatii despre stoc temporar indisponibile
Standard
10
Documente Tehnice (Imaginile sunt cu titlu informativ. Va rugam sa consultati specificatiile tehnice.)
Specificatii
Marca
STMicroelectronicsProduct Type
Watchdog Timer
Montare
Surface
Sub Type
Watchdog
Tip pachet
SOT-323
Number of Internal Timers
1
Numar pini
5
Tensiune de alimentare minima
2.7V
Tensiune de alimentare maxima
5.5V
Temperatura maxima de lucru
125°C
Frecventa minima de auto-rezonanta
-40°C
Lungime
2.2mm
Inaltime
1mm
Standards/Approvals
No
Automotive Standard
AEC-Q100
Series
STWD100
Detalii Produs
The Watchdog Timer integrated circuit is a self-contained device for preventing system failures. Certain types of hardware or software errors could cause the electronics system to fail. The watchdog timer has an input that is used to clear the watchdog timer periodically within a specified timeout period. While the system is operating correctly, the watchdog output is not asserted. If the watchdog timer is not cleared, the watchdog output generates a processor interrupt or reset.