Documente tehnice
Specificatii
Montare
Surface Mount
Tip pachet
QFN
Numar pini
24
Dimensiuni
4 x 4 x 0.85mm
Lungime
4mm
Inaltime
0.85mm
Maximum Operating Supply Voltage
3.63 V
Latime
4mm
Temperatura minima de lucru
-40 °C
Temperatura maxima de lucru
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Tara de origine
Taiwan, Province Of China
Detalii produs
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.
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Incercati din nou mai tarziu
€ 19,75
Each (Supplied in a Tray) (fara TVA)
€ 23,50
Each (Supplied in a Tray) (cu TVA)
1
€ 19,75
Each (Supplied in a Tray) (fara TVA)
€ 23,50
Each (Supplied in a Tray) (cu TVA)
1
Cumpara in pachete mari
Cantitate | Pret unitar |
---|---|
1 - 24 | € 19,75 |
25 - 99 | € 18,46 |
100 - 499 | € 17,86 |
500 - 999 | € 17,21 |
1000+ | € 16,61 |
Documente tehnice
Specificatii
Montare
Surface Mount
Tip pachet
QFN
Numar pini
24
Dimensiuni
4 x 4 x 0.85mm
Lungime
4mm
Inaltime
0.85mm
Maximum Operating Supply Voltage
3.63 V
Latime
4mm
Temperatura minima de lucru
-40 °C
Temperatura maxima de lucru
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Tara de origine
Taiwan, Province Of China
Detalii produs
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.